Capgemitecp3
Capgemini Engineering is seeking an experienced Analog and RF Layout Engineer to develop complex analog and mixed-signal integrated circuits in advanced CMOS FinFET technologies. The role involves collaborating with design and verification teams to deliver high-performance silicon for advanced communications and high-speed data applications. The position requires leading layout implementation and optimizing designs for performance, manufacturability, and reliability.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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and employee contacts for Capgemitecp3.
29% below the average for this role