marvellsemiconductor.com
An Analog Layout Engineer at Marvell works within the Central Engineering business group to graphically design microelectronic layers based on schematics provided by Analog IC Designers. The role involves using CAD tools to implement design layers, running verifications, debugging, and collaborating closely with designers and global teams to meet technical specifications. Engineers in this position iterate designs over projects lasting several months to a year and a half while presenting progress to various stakeholders.
Headquarters
Santa Clara, California, United States
Company Size
1001-5000 employees
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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marvellsemiconductor.com didn’t post a salary, so this is our estimate from similar listings.
21% below the average for this role