marvellsemiconductor.com
As a CE Analog Layout Engineer at Marvell, you will deliver high-quality, optimized layouts for cutting-edge semiconductor products by running simulations and collaborating with designers to meet stringent performance and power specifications. This role involves managing tasks across the full development cycle, from floorplanning and layout to verification, while engaging with global teams to refine and debug complex analog circuits. You will assume increasing ownership of tasks ranging from cells to full interfaces, ensuring successful product realization through iterative technical mentorship and shared collaboration.
Headquarters
Santa Clara, California, United States
Company Size
1001-5000 employees
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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and employee contacts for marvellsemiconductor.com.
42% below the average for this role