Cirrus Logic
The role involves collaborating with design engineers to create and verify high‑performance mixed‑signal CMOS integrated circuit layouts using Cadence Virtuoso XL and Mentor Calibre tools. Responsibilities include solving layout design issues, applying device matching and signal conditioning techniques, and ensuring optimal circuit performance through effective floor planning and routing.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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and employee contacts for Cirrus Logic.
Cirrus Logic didn’t post a salary, so this is our estimate from similar listings.
46% below the average for this role