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© All Rights Reserved. ApplyBlast.com
Capgemitecp3
Capgemini Engineering is seeking an experienced Analog / RF Layout Designer to provide onsite support for advanced semiconductor nodes in Santa Clara, CA. The role involves contributing to cutting-edge analog and mixed-signal IP development, working across complex technologies such as FinFET and deep sub-micron processes. This position offers end-to-end ownership from block-level design through top-level integration for a global design and layout organization.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Capgemitecp3.
13% below the average for this role