ASIC Design Engineer Intern
Ambarella(5 months ago)
About this role
An RTL design engineer role focused on AI vision processors for edge camera applications. The position supports development of processor cores and accelerators that enable on-device analytics of high-resolution video streams. The candidate will be part of a semiconductor hardware team delivering silicon for intelligent camera solutions.
Required Skills
- Verilog
- System Verilog
- VLSI Design
- Logic Design
- RTL Synthesis
- Verification
- UVM
- C++
- Perl
- Scripting
+6 more
Qualifications
- Master's Degree in Electrical/Electronics/Computer Engineering
About Ambarella
ambarella.comAmbarella's advanced imaging solutions make cameras smarter by extracting valuable data from high-resolution video streams.
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