Hewlett Packard Enterprise
An ASIC Design Engineer at HPE Networking designs high-speed networking chips, translating functional specifications into detailed micro-architectures using Verilog or System Verilog. Responsibilities include collaborating with physical design and verification teams to ensure timing closure and full validation of complex modules and subsystems. The role emphasizes innovation, leadership mentoring, and developing expertise in building high-density silicon solutions from concept to final netlist.
Headquarters
The Woodlands, Texas, United States
Company Size
10001+ employees
Founded
1939
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Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Hewlett Packard Enterprise.
4% above the average for this role
Hewlett Packard Enterprise Announces $2 Billion Debt Offering
17 hours ago