ASIC Development Technical Leader

The ASIC Development Technical Leader drives the fullchip floorplan and RTL-to-GDSII implementation for innovative hardware platforms powering Cisco's core products. This role involves collaborating with system and package design teams to optimize performance, power, and die size while defining signoff methodologies with foundry and IP vendors. The position requires expertise in hierarchical implementation flows, low-power design, and leveraging AI tools to enhance productivity.