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© All Rights Reserved. ApplyBlast.com
Cisco Systems, Inc.
The ASIC DFT Engineer role at Acacia, part of Cisco, supports the implementation, validation, and signoff of Design-for-Testability for complex ASIC and SoC designs. This hybrid position requires hands-on experience with scan insertion, MBIST, ATPG, and DFT rule checks to deliver high-quality test coverage and manufacturability. The engineer collaborates with cross-functional teams to debug DFT issues, automate flows, and support silicon debug and yield-learning activities.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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