ASIC Engineer Sr Staff
Hewlett Packard Enterprise(4 months ago)
About this role
Hewlett Packard Enterprise is hiring a senior Design-for-Test (DFT) ASIC Engineer to work on advanced 3nm (and beyond) networking silicon within HPE Networking. The role is a hybrid position (about two days per week onsite) contributing to the testability and reliability of high-performance networking ASICs. The position sits within HPE’s silicon team focused on cutting-edge networking platforms and silicon innovation.
Required Skills
- DFT
- Scan Compression
- ATPG
- MBIST
- Silicon Bringup
- Failure Analysis
- Scripting
- Perl
- Tcl
- Timing Analysis
+9 more
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