Cisco Systems, Inc.
This role involves developing and verifying next-generation ASIC packaging for Cisco platforms, focusing on ultra-high-speed signaling and power integrity. The engineer will analyze substrate signal and power integrity, collaborate with layout teams, and ensure optimal solutions across interposers, substrates, and PCBs. The position requires expertise in high-speed design principles, SI/PI simulation, and physical validation to support complex network and data center solutions.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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