ASIC Verification Engineer - PMU
NVIDIA(27 days ago)
About this role
The PMU IP team develops NVIDIA's Power Management Unit IP—a RISC-V core plus custom control logic—that optimizes chip performance and power across data center, automotive, and personal computing products. This Senior Verification Engineer will join the PMU IP team to help advance and validate the PMU engine used to determine optimal operating points across the chip. The role is part of a long-established IP effort (17 years) focused on chip power efficiency.
Required Skills
- SystemVerilog
- UVM
- Formal Verification
- Python
- Perl
- C++
- IC Design
- Testbench
- Regression
- Debugging
Qualifications
- BS (4+ years experience)
- MS (2+ years experience)
About NVIDIA
nvidia.comNVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.
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