ATPG Engineer

Marvell is seeking a motivated student to join its Design-for-Test team as an ATPG Engineer, offering hands-on experience in developing and implementing test methodologies for complex SoC designs. The role focuses on scan insertion, pattern generation, and fault coverage analysis while collaborating with IP teams and design groups to resolve technical verification issues. This position provides an opportunity to contribute to transformative innovation in semiconductor solutions for enterprise, cloud, and AI architectures.