Chief Memory Chip Design Engineer & Architect

This role serves as the most senior technical individual contributor in memory design, owning the end-to-end product architecture from concept through silicon qualification. The position defines memory subsystem architecture, drives floorplan and physical architecture, and manages the multi-generation roadmap for node migration and performance scaling. It involves making critical cross-functional trade-offs across process integration, circuits, and packaging while mentoring senior engineers and representing the architecture to key stakeholders.