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Compute Subsystem Verification Engineer at MatX - ApplyBlast

Compute Subsystem Verification Engineer

MatX

1 month ago

Remote

Full Time

Senior

0 applicants

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About this role

This role focuses on the verification of MatX's compute subsystem, which implements core numerics and control paths for hardware acceleration of ML workloads. The engineer will develop scalable verification methodologies, create testbenches, and drive coverage closure across blocks and subsystems. The position also involves qualifying software stacks and leading verification reviews toward silicon milestones like design freeze and tapeout.

Responsibilities

Contribute to compute subsystem verification methodology across blocks and fullchip
Own verification execution at subsystem level and create testbenches for coverage closure
Plan and drive verification reviews toward silicon milestones including design freeze and tapeout

Skills

About MatX

matx.com

Headquarters

Mountain View, California, United States

Company Size

1-10 employees

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MatX designs high-throughput chips and systems purpose-built for large transformer AI models, with their MatX One chip delivering leading FLOPS/mm2, low-latency decode, and the most scale-up interconnect of any announced product. Supporting clusters of hundreds of thousands of chips, MatX targets training, RL, and inference workloads for large dense and MoE models with no upper limit on model size, serving the large model needs of frontier labs. MatX provides a programming model that gives users direct hardware control, with weights typically in SRAM for low latency and KVs in HBM for long-context support.