Visa
As a Data Engineer on Visa's GenAI Platforms team, you will architect and scale intelligent data infrastructure supporting large language models, AI agents, and semantic search systems. This role focuses on building AI-native retrieval pipelines, vector indexing solutions, and real-time orchestration workflows rather than traditional data warehousing. You will collaborate with software engineers and scientists to create secure, production-grade systems that transform enterprise data into context-aware AI experiences.
Headquarters
Foster City, California, United States
Company Size
10001+ employees
Founded
1958
Visa is a global payments technology company that connects consumers, merchants, financial institutions, and governments to enable fast, secure digital transactions across channels and currencies. It provides card products and benefits, payment processing, fraud prevention and security services, and cross-border and travel support. Visa also offers developer tools and APIs, tokenization, and other platform services that banks, merchants, and partners use to build and scale payment experiences worldwide. Trusted for its reliability and broad acceptance, Visa focuses on making commerce convenient and secure.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Visa.
AI Data Engineer III
Rimini Street
Lead AI Engineer
Software Technology Inc
Research & Architectural Roadmap: Define the multi-year vision for Windows OS search, context-aware indexing, semantic file retrieval, and OS-level neural search systems. On-Device AI & NPU Optimization: Design, adapt, and compress state-of-the-art SLMs and embedding models (via quantization, pruning, and distillation) for local execution on NPUs, GPUs, and CPUs via frameworks like ONNX Runtime/DirectML. Core OS & Storage Integration: Architect low-latency vector indexing structures and hybrid search rankers integrated into the OS file system and runtime, ensuring minimal system memory footprint and battery drainage. Contextual & Semantic Graph Retrieval: Design algorithms that synthesize user activity context, application telemetry, and semantic relationships without compromising user privacy or shipping raw data off-device. Zero-Trust & Local Privacy: Guarantee zero-trust computational isolation where search indexing, embedding generation, and contextual ranking remain strictly on-device. Cross-Disciplinary Leadership: Partner closely with Core OS Systems Engineering, Hardware Acceleration Teams, Silicon Partners (Intel, AMD, Qualcomm), and Product UX teams to ship research innovations into production releases. IP & Scientific Visibility: Drive strategic patent filings, publish in top-tier IR/AI venues, and mentor senior researchers and engineering leads across the division. Define the long-term architectural direction for Windows Search, including indexing pipelines, retrieval systems, ranking, and semantic enrichment. Serve as the research authority for Search-related design reviews, tradeoff discussions, and platform decisions. Drive research clarity across boundaries: Search Platform, Indexer, AI models, telemetry, reliability, and user-facing surfaces. Anticipate future needs for agentic and AI-driven Search, identifying capability gaps and guiding multi-year investments. Partner with Product Managers to translate customer scenarios into durable technical primitives and measurable quality signals. Mentor senior engineers and architects, raising the bar on design rigor, system thinking, and operational excellence. Influence engineering standards, design patterns, and best practices across Search and adjacent platform teams. Doctorate in relevant field AND 6+ years related research experience. OR Master's Degree in relevant field AND 7+ years related research experience. OR Bachelor's Degree in relevant field AND 9+ years related research experience. OR equivalent experience. These requirements include but are not limited to the following specialized security screenings: 15+ years of experience shipping commercial software or platform technologies at scale. Prior experience owning or architecting end-to-end Search platforms (system, web, enterprise, or OS-level). Experience with semantic search, vector search, knowledge graphs, context-retrieval and content understanding systems. Familiarity with Windows platform internals, diagnostics, and performance tooling. Experience designing Search systems that power agentic workflows or AI-driven user experiences. Solid track record of improving architectural health, reliability, and operational maturity of complex systems. Demonstrated success influencing product and technical direction across multiple organizations. Education: Ph.D. or Master's degree in Computer Science, Artificial Intelligence, Information Retrieval, Systems Engineering, or related quantitative discipline. Experience: 8+ years (Ph.D.) or 10+ years (Master's/B.S.) of post-academic research or industry software engineering experience in Information Retrieval, Applied NLP, Machine Learning Systems, or Operating Systems. Search & Retrieval Systems: Expert knowledge of hybrid search architectures (combining BM25/lexical indices with dense vector embeddings), approximate nearest neighbor (ANN) search algorithms (e.g., HNSW, DiskANN), and re-ranking pipelines. On-Device ML Acceleration: Hands-on experience optimizing and deploying ML models under tight compute, latency, and thermal budgets using ONNX Runtime, DirectML, CoreML, or TensorRT. Systems Programming: Advanced proficiency in C++ (C++17/20) or Rust, with a deep understanding of multi-threading, memory alignment, OS file systems, and concurrency control. Hardware & Silicon Co-Design: Familiarity with NPU architectures, SIMD instruction sets (AVX/NEON), GPU compute kernels, and memory-bandwidth trade-offs on heterogeneous SoC architectures. Privacy-Preserving Computation: Knowledge of federated learning techniques, differential privacy, and local secure enclave execution for contextual intelligence. Strategic Ambiguity Navigation: Capability to convert broad, exploratory research concepts into concrete, executable system architectures. Influence Without Authority: Proven track record of guiding cross-functional teams spanning pure AI researchers, hardware vendors, and core OS engineers toward a unified technical vision. Executive Technical Communication: Outstanding ability to translate deep mathematical and systems trade-offs into compelling business and product cases for senior leadership.
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