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Design Engineer II at Cadence - ApplyBlast

Design Engineer II

Cadence

2 days ago

4.0 on Glassdoor

Shanghai, Shanghai, China

Onsite

Full Time

Medior

0 applicants

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About this role

The Design Engineer II role at Cadence focuses on high-speed digital DDR and HBM IP physical implementation. The position requires a strong background in physical design, including floorplan, place and route, physical verification, and DFM. Candidates should possess a solid foundation in circuits, electronics, and physics, along with scripting skills in languages like Perl, C shell, and Makefile. The role emphasizes technical delivery, teamwork, and a commitment to design quality and schedule adherence.

Responsibilities

Focus on high speed digital DDR and HBM IP physical implementation
Perform digital implementation including Floorplan, P&R, Physical verification, and DFM
Apply solid background in circuits, electronics, and physics to advance node technologies

Skills

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

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Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.