Design Engineering Architect
Cadence(1 month ago)
About this role
Cadence is hiring a DV Architect to provide senior technical leadership for the verification strategy and infrastructure of next-generation Tensilica CPU cores and configurable processors. The role focuses on ensuring the functional integrity of complex instruction set architectures across multiple processor variants and generations while setting standards for verification quality across teams.
Required Skills
- Design Verification
- DV Architecture
- Verification Methodology
- Testbench Architecture
- SystemVerilog
- UVM
- C
- C++
- Formal Verification
- Coverage Analysis
+14 more
Qualifications
- B.Tech in ECE
- M.Tech in ECE
About Cadence
cadence.comCadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.
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