Design Verification Engineer
Astera Labs(30 days ago)
About this role
Astera Labs is expanding its R&D center in Israel to develop complex semiconductor chips that address data bottlenecks in AI infrastructure. The company specializes in purpose-built connectivity solutions, integrating semiconductor technologies with software to enable scalable AI systems.
Required Skills
- SystemVerilog
- UVM
- Verification
- Debugging
- Connectivity
- Semiconductors
- ASIC
- Verification Environment
- Protocols
- Emulation
Qualifications
- Bachelor's degree in Electrical Engineering or related field
- 3+ years of ASIC verification experience
About Astera Labs
asteralabs.comAstera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
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