Design Verification Manager

Astera Labs(5 days ago)

IsraelOnsiteFull TimeSenior$142,789 - $193,185 (estimated)Research and Development

About this role

Astera Labs is establishing a new R&D center in Israel focused on developing advanced semiconductor chips for AI infrastructure. They are seeking a Design Verification Manager to lead verification strategies and teams, ensuring high standards for next-generation AI hardware. The role offers a unique chance to build and influence a growing engineering organization in a cutting-edge field.

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Required Skills

verification
Testbenches
UVM
Formal Verification
Emulation
Python
Tcl
ASIC Verification
High-Speed Protocols
Leadership

About Astera Labs

asteralabs.com

Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.

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