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© All Rights Reserved. ApplyBlast.com
Cirrus Logic
The DFT Engineer will design and verify design-for-test features for mixed-signal audio SoCs, including memory BIST insertion, scan insertion, and ATPG pattern generation. The role involves collaborating with a team to improve test coverage, perform cost analysis, and deliver test patterns to support silicon bring‑up and product testing.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Cirrus Logic.
Cirrus Logic didn’t post a salary, so this is our estimate from similar listings.
26% above the average for this role