Neurophos
The Electronic IC (EIC) Hardware Technical Program Manager leads the end-to-end development of the high-speed mixed-signal ASIC at the core of the company's optical compute engine. This role serves as the central point of contact across architecture, design, verification, and manufacturing teams, driving the program from architecture convergence through tapeout and post-silicon bring-up. The position emphasizes an AI-first development flow, leveraging AI tools to enhance efficiency across specification management, scheduling, and verification processes.
We develop OPUs (optical processing units) that are 100x faster and 100x more energy efficient than current GPUs. Neurophos' OPUs compute massive matrix multiplications fully in-memory, with extremely high clock speeds
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Neurophos.
38% above the average for this role
Principal Photonics IC Design Engineer
Coherent
Staff Engineer, Design Verification
marvellsemiconductor.com
Senior Principal Engineer, Design Verification
marvellsemiconductor.com
Principal Photonics IC Design Engineer
NVIDIA
Director, ASIC Design & Front-End Implementation
Hewlett Packard Enterprise
R&D IC Design Engineer
Broadcom