Altera

FPGA DDR and IO Subsystem Architect

Altera

1 month ago
San Jose, California
Onsite
Full Time
Senior
0 applicants
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Altera
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About this role

Altera, a leader in FPGA technology, is seeking an experienced FPGA Architect specializing in DDR and high-speed IO subsystems. The role involves defining and driving the architecture for next-generation memory and IO solutions, collaborating across teams, and ensuring product excellence from concept to production. It offers the opportunity to influence industry-leading performance and power efficiency in cutting-edge silicon solutions.

Skills

Qualifications

BS in Electrical Engineering10+ years in RTL and ASIC design
Altera

About Altera

altera.com

Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.

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