Teradyne
Teradyne's Memory Test Division seeks a motivated FPGA Design Engineer to support the development of cutting-edge memory test solutions. The role involves architecting and implementing FPGA solutions for next-generation Flash and DRAM test instrumentation, providing technical guidance to junior engineers, and translating customer requirements into reliable designs. Success in this position requires delivering high-quality products to market quickly while collaborating within a dynamic, global team.
Headquarters
North Reading, Massachusetts, United States
Company Size
5001-10000 employees
Founded
1960
Teradyne offers cutting-edge technological solutions for modern problems through innovation expertise. Stay connected with Teradyne’s offerings. Learn more.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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