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FPGA Digital Designer Engineer Intern at Kepler Communications - ApplyBlast

FPGA Digital Designer Engineer Intern

Kepler Communications

3 months ago

3.2 on Glassdoor

Toronto, Ontario, Canada

Hybrid

Internship

Intern

0 applicants

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About this role

Kepler Communications is seeking a top‑tier FPGA Digital Designer Engineer Intern to develop RTL code for next‑generation satellites and ground stations. The role involves maintaining and expanding the FPGA code base, designing custom IP, and working with high‑speed interfaces while receiving mentorship in a collaborative, hybrid environment.

Responsibilities

Maintain and enhance FPGA code base for SDR and SDN
Design custom IP for satellite and ground‑station features
Integrate new sensor and communication interfaces such as SPI, I2C, UART
Develop and verify high‑speed FPGA interfaces like JESD204b and 10G Ethernet
Collaborate with hardware and software teams on satellite and earth‑station projects

Skills

About Kepler Communications

kepler.space

Headquarters

Toronto, Ontario, Canada

Company Size

51-200 employees

Founded

2015

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Kepler Communications is a space infrastructure company that operates the Kepler Network, a cloud environment on orbit providing real-time connectivity, on-orbit compute, and hosted payload services. Its platform powers next-generation space missions by bringing advanced processing and scalable cloud concepts closer to the source, enabling faster decisions and more autonomous systems. Kepler serves commercial, government, and scientific customers seeking accelerated, cost-effective access to orbit and in-space computing capabilities.