Altera
The FPGA Silicon Design Verification Engineer will lead pre‑silicon verification of FPGA IP blocks, subsystems, and SoC‑level designs, creating and executing verification plans, testbenches, and coverage models. The role involves close collaboration with RTL designers, architects, firmware, and validation teams to ensure first‑pass silicon success and support post‑silicon bring‑up as needed.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
28% below the average for this role
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