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Hardware Engineering Active Electric Cable / Smart Cable Module, AVP at Astera Labs - ApplyBlast

Hardware Engineering Active Electric Cable / Smart Cable Module, AVP

Astera Labs

4 months ago

4.3 on Glassdoor

San Jose, California, United States

Onsite

Full Time

Senior

0 applicants

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About this role

An AVP of AEC/SCM Hardware Engineering leads the development of high-speed active electrical, copper, and smart cable solutions at Astera Labs. The role involves driving technology roadmaps, managing multidisciplinary teams across hardware, firmware, and testing, and overseeing products from concept through qualification to launch. Success requires balancing innovation with execution while aligning product development with customer needs and manufacturing realities.

Responsibilities

Lead cross-functional engineering teams across hardware, firmware, and testing disciplines
Drive R&D and new product development for high-speed electrical interconnect technologies
Define and manage the technology roadmap aligned with market and customer needs
Oversee products from concept and design through qualification and commercial launch
Collaborate with manufacturing and validation teams to ensure product reliability and performance

Skills

Qualifications

Advanced Degree in Electrical Engineering or Mechanical Engineering

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

View Profile

Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.