HBM IO Design Architecture Engineer

The HBM IO Design Architecture Engineer is responsible for building and owning the end-to-end design quality system for High Bandwidth Memory products, ensuring silicon learnings are systematically captured and fed back into future designs. This role involves defining standardized IO design quality processes, correlating silicon measurements with simulation performance, and leveraging AI-driven analytics to accelerate root cause identification. The position requires collaboration across cross-functional teams to drive innovation and standardization in high-speed IO design architecture.