Cirrus Logic
This role involves working closely with design engineering to complete the layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools. The position requires generating topological layouts to ensure optimal circuit performance while collaborating with circuit engineers. Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC layout experience is required.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Cirrus Logic.
Cirrus Logic didn’t post a salary, so this is our estimate from similar listings.
47% below the average for this role