Cadence
This is an on-site internship role within Cadence's DDR IP group focused on Post-Silicon Validation Engineering. The intern will validate system-level and electrical performance of silicon test chips, debug issues in collaboration with design teams, and deliver characterization reports. Candidates must have strong fundamentals in analog and digital electronics, RTL, and signal integrity.
Headquarters
San Jose, California, United States
Company Size
10001+ employees
Founded
1988
Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Cadence.
Cadence didn’t post a salary, so this is our estimate from similar listings.
30% below the average for this role
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