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Intern at Cadence - ApplyBlast

Intern

Cadence

5 days ago

4.0 on Glassdoor

Valbonne, Provence-Alpes-Côte d'Azur, France

Onsite

Internship

Intern

0 applicants

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About this role

Cadence is seeking a final-year engineering or Master's student for a 6-month internship in Sophia-Antipolis, France, starting in early Q1 2027. The role offers hands-on experience in SRAM development, memory design, and characterization within a leading EDA and IP company. Candidates can choose from three specialized topics focusing on advanced SRAM design, statistical yield optimization, or power characterization methodologies.

Responsibilities

Analyze impact of process variations on SRAM self-timing paths and yield
Develop variation-aware design and optimization methodologies for memory compilers
Validate power trends and optimize characterization strategies for memory architectures

Skills

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

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Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.