FA
This role involves managing layout schedules, effort estimation, and risk mitigation for IC layout activities while collaborating with design, packaging, and process teams. The position requires expertise in full-chip layout, analog and mixed-signal techniques, and parasitic analysis to ensure high-quality design release. The engineer will also mentor junior staff and drive process improvements to meet project timelines and quality standards.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for FA.
FA didn’t post a salary, so this is our estimate from similar listings.
25% below the average for this role