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Lead Design Engineer - Layout at Cadence - ApplyBlast

Lead Design Engineer - Layout

Cadence

3 months ago

4.0 on Glassdoor

Shanghai, China

Onsite

Full Time

Senior

0 applicants

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About this role

A Lead Design Engineer at Cadence creates custom layout floorplans for mixed-signal and high-speed PHYs like SerDes and USB. The role involves optimizing resistor and capacitor placement, managing routing layers to reduce noise and coupling, and collaborating with analog circuit design teams to ensure high-quality IC layouts. Candidates must have extensive experience with advanced layout tools and conducting DRC/LVS/ERC analysis for sophisticated technology nodes.

Responsibilities

Create custom layout floorplans for mixed-signal and high-speed PHYs
Optimize resistor and capacitor placement while reducing coupling and noise
Manage top-level hierarchy floorplan blocks and power distribution
Conduct DRC, LVS, and ERC analysis to ensure design quality
Collaborate with analog circuit design teams for efficient layout solutions

Skills

Qualifications

BS in Electrical Engineering

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

View Profile

Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.