Lead Design Engineer

BETA CAE Greece(4 months ago)

Bangalore, IndiaOnsiteFull TimeMedior$86,307 - $116,234 (estimated)Engineering

About this role

As part of the Cadence DDR PHY IP Front End Design team, the role involves developing firmware for DDR5 PHY using microcontrollers and collaborating with hardware designers and memory subsystem architects. The position requires strong debugging skills in RTL based hardware simulations and interaction with the verification team for firmware-hardware co-verification planning.

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Required Skills

Firmware Development
C Programming
Debugging
RTL Simulations
Collaboration

About BETA CAE Greece

beta-cae.com

BETA CAE Systems is a leading provider of advanced simulation software solutions that cater to the needs of engineers and researchers in various fields, including automotive, aerospace, and manufacturing. With a comprehensive suite of tools for computer-aided engineering (CAE), BETA empowers users to effectively perform tasks related to finite element analysis (FEA), computational fluid dynamics (CFD), and process automation. Recently acquired by Cadence, the company continues to innovate in areas such as machine learning and predictive analysis, bolstering its commitment to enhancing product design and simulation accuracy.

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