Lead Design Engineer
BETA CAE Greece(1 year ago)
About this role
An IP Integration and Release Engineer at Cadence will work within the SSG IP Release engineering team based in Bangalore. The role focuses on IP integration, verification, and release of Cadence's IP solutions to various customers, necessitating collaboration with existing RTL designs and ensuring the quality of integration and verification processes.
Required Skills
- RTL Integration
- Verification
- ASIC Development
- System Verilog
- UVM
Qualifications
- BE/BTech/ME/MTech - Electrical Electronics VLSI
About BETA CAE Greece
beta-cae.comBETA CAE Systems is a leading provider of advanced simulation software solutions that cater to the needs of engineers and researchers in various fields, including automotive, aerospace, and manufacturing. With a comprehensive suite of tools for computer-aided engineering (CAE), BETA empowers users to effectively perform tasks related to finite element analysis (FEA), computational fluid dynamics (CFD), and process automation. Recently acquired by Cadence, the company continues to innovate in areas such as machine learning and predictive analysis, bolstering its commitment to enhancing product design and simulation accuracy.
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