Lead Standard cell design/characterization Engineer

This role leads the development of standard cell and differentiated IP library solutions at NXP, focusing on reliability, design for test (DfT), and timing closure. The position involves designing macros such as flip-flops and level shifters across various technology nodes while integrating AIML/AI literacy into the workflow. Collaborative efforts include enhancing circuit designs, creating EDA views for characterization, and advancing RTL2GDS flows using expert EDA tools.