Low power design engieer/micro-architect L5
DeepMind(21 days ago)
About this role
Google DeepMind is hiring a Low Power Design Engineer / Micro-architect to help develop custom silicon IP for machine learning acceleration within its GenAI technical infrastructure research hardware team. The role focuses on enabling ambitious performance-per-watt targets for next-generation AI hardware in a fast-moving research environment. You will operate as a hands-on technical leader shaping power-efficient silicon designs for ML workloads.
Required Skills
- Low-Power Design
- Microarchitecture
- ASIC Design
- RTL Design
- Verilog
- SystemVerilog
- Clock Gating
- Power Gating
- DVFS
- Multi-Voltage Domains
+10 more
Qualifications
- BS in Electrical Engineering
- BS in Computer Science
- MS in Related Field
- PhD in Related Field
About DeepMind
deepmind.googleGoogle DeepMind is an AI research lab within Alphabet focused on solving intelligence and building safe, general-purpose artificial intelligence to advance science and benefit humanity. It develops cutting-edge machine learning methods—especially deep learning, reinforcement learning and neuroscience-inspired models—and has produced landmark systems such as AlphaGo, AlphaZero and AlphaFold. DeepMind partners with academia, healthcare providers and other Google teams to apply AI to scientific discovery, medicine, energy efficiency and real-world problems. The organization emphasizes safety, interpretability and responsible deployment alongside publishing research and tools for the wider community.
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