NVIDIA
As a Memory Mask Design Engineer at NVIDIA, you will implement IC layouts for high-performance, high-speed CMOS integrated circuits in advanced process nodes like 3nm and 5nm. The role focuses on delivering full custom memory layouts, incorporating significant digital components, and adhering to strict industry standard methodologies. You will work closely with diverse teams to ensure layouts meet quality checks and optimize design practices for memory circuits.
Headquarters
Santa Clara, California, United States
Company Size
10001+ employees
Founded
1993
NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.
NVIDIA Ignites the Next Industrial Revolution in Knowledge Work With Open Agent Development Platform
2 days ago
Nvidia CEO Says Company Is Firing Up H200 Production for China
1 day ago
Nvidia CEO Huang says company sees more than $1 trillion in sales through 2027
1 day ago
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for NVIDIA.
NVIDIA didn’t post a salary, so this is our estimate from similar listings.
11% below the average for this role
Nvidia's one of the fastest growing companies with one of the lowest valuations, says Jim Cramer
14 hours ago
Memory Mask Design Engineer
Coherent
Senior Digital/Memory Mask Design Engineer
Coherent
Memory Mask Layout Designer Tijuana Baja California Mexico
Qualcomm Incorporated
Analog IC Layout Intern
marvellsemiconductor.com
Sr Staff Mask Design Engineer
Renesas 瑞萨电子
Principal Designer, Mask Design Engineering • Memory Technology
Sandisk