Mixed-Signal Verification Engineer III

onsemi is seeking a Mixed-Signal Verification Engineer III to verify analog and mixed-signal IP integrated into digital-on-top SoC environments on the Treo platform. This mid-level role involves developing and executing verification solutions using SystemVerilog and behavioral modeling to ensure power and clock IP meet functional requirements prior to tape-out. The position requires collaboration with analog designers and system teams to drive debug and ensure verification completeness.