Physical Design Graduate Intern
Altera
About this role
Altera is seeking a Physical Design Intern to support implementation of high-speed IP blocks (e.g., PCIe, Ethernet, CXL) within its programmable logic and acceleration platform portfolio. This is a fixed-term, full-time internship based in San Jose, CA (Bay Area), running approximately 12–15 months, suitable for graduate students pursuing a Master’s or PhD.
Skills
Qualifications
About Altera
altera.comAltera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Salary
$90k – $101k
per year