Physical Design Manager
Astera Labs(30 days ago)
About this role
Astera Labs is establishing a new R&D center in Israel focused on developing complex semiconductor chips for AI infrastructure. The company aims to build a local engineering team to lead the physical implementation of chips that support hyperscale AI data centers, emphasizing innovation in deep-submicron processes and advanced technology nodes.
Required Skills
- RTL
- GDS
- Physical Design
- EDA Tools
- Power Analysis
- High-Speed Interfaces
- IC Design
- Process Technology
- Signoff
- Team Leadership
Qualifications
- BS in Electrical Engineering
- 10+ years experience in Physical Design/Backend
About Astera Labs
asteralabs.comAstera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
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