Principal Analog Design Engineer

The Principal Analog Design Engineer is responsible for architecting, designing, and verifying CMOS analog blocks for custom ASICs, including high-speed DDR I/O interfaces, Tx/Rx circuits, and PLLs. This role requires expertise in signal integrity, noise immunity, and low-power circuit design to meet stringent performance and timeline constraints. The position involves collaborating with cross-functional teams, providing technical leadership, and ensuring designs meet reliability and layout standards.