Principal Design Verification Engineer
Astera Labs(3 days ago)
About this role
Astera Labs is seeking experienced Design Verification Professionals specialized in industry-standard protocols like PCIe and CXL to contribute to the functional verification of complex SoC and silicon products for high-performance applications. The role involves developing verification plans, writing test sequences, and collaborating with designers to ensure design correctness.
Required Skills
- PCIe
- CXL
- Verification
- UVM
- Assertions
- Coverage
- VIP
- Protocols
- Simulation
- Verification IPs
About Astera Labs
asteralabs.comAstera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
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