Principal Engineer, ASIC Validation

The Principal Engineer, ASIC Validation leads the complete deployment and validation of System-on-Chip (SoC) designs on pre-silicon platforms like ZEBU and HAPS. This role requires extensive hands-on experience with FPGA flows, emulation tools, and processor-based SoC prototyping to debug and verify complex subsystems. The position involves collaborating with design, firmware, and architecture teams to ensure successful PCIe, LPDDR, and ONFI bring-up and validation.