Principle DFT Engineer

About this role

Responsibilities

• Implement and verify scan architectures for complex SoC designs
• Generate and analyze ATPG patterns for stuck-at and transition faults
• Execute Gate-Level Simulation with and without SDF for DFT validation
• Collaborate with RTL and physical design teams to ensure clean signoff
• Debug DFT and GLS issues independently for pre- and post-silicon testing