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© All Rights Reserved. ApplyBlast.com
Ranovus
Ranovus is seeking a Senior Analog ASIC Design Engineer to join the Analog & Mixed-Signal IC Design and Integration team in Nuremberg, Germany. The role involves designing, developing, and testing advanced electro-optical transceiver chips, including high-speed components and auxiliary analog circuits. The position requires collaboration with layout and system architecture teams to bring innovative hardware solutions to life.
Ranovus architects optical infrastructure for AI, delivering silicon photonics-based co-packaged optics (CPO) and near-package optics (NPO) designed for XPU and switch architectures in large-scale AI compute clusters. The company's platform combines proprietary Quantum Dot and Quantum Well Lasers, RAMZI Modulators, and monolithic integration to achieve multi-terabit optical engines with industry-leading power efficiency and shoreline density. Ranovus operates an end-to-end engagement model spanning silicon photonics design, semiconductor foundry collaboration, advanced packaging, and high-volume manufacturing to accelerate hyperscaler adoption.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Ranovus.
Ranovus didn’t post a salary, so this is our estimate from similar listings.
43% below the average for this role
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