Senior Analog Engineering Manager

A Technical Leader in Analog and Mixed-Signal IC Design at Renesas drives the architecture, design, and implementation of next-generation DDR5/DDR6 physical layer circuits. This role involves mentoring senior engineers, managing cross-functional partnerships with digital teams and package partners, and ensuring robust timing closure for high-speed memory interfaces. Candidates must possess deep expertise in analog/mixed-signal design, signal integrity, and clocking architectures while leading teams through complex development cycles.