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Celero Inc
Celero Communications is seeking a Senior ASIC Design Engineer to develop advanced ASICs for high-speed optical communication systems. The role involves designing high-performance digital circuits, integrating DSP and SerDes functionality, and collaborating with cross-functional teams to optimize designs for performance, power, and area. The ideal candidate will have strong expertise in digital ASIC design, Verilog/SystemVerilog, and experience with mixed-signal technologies.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
Celero Inc didn’t post a salary, so this is our estimate from similar listings.
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