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© All Rights Reserved. ApplyBlast.com
weekday.ai
The Senior ASIC RTL Design Engineer will lead the development and verification of ASIC register‑transfer‑level (RTL) designs, ensuring high performance and low power consumption. The role involves collaborating with cross‑functional hardware and verification teams to translate specifications into robust silicon implementations and to troubleshoot design issues throughout the development cycle.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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