Senior ASIC Synthesis and STA Engineer
Ciena(1 day ago)
About this role
Ciena is seeking a candidate to contribute to the front-end implementation of high-performance ASIC technology in their next-generation Wavelogic Digital Signal Processor programs. The role involves collaboration with cross-disciplinary teams to ensure the design and integration of industry-leading optical networking solutions.
Required Skills
- ASIC
- RTL
- Synthesis
- TimingAnalysis
- EdaTools
- HardwareDescriptionLanguages
- Automation
- PlaceAndRoute
- DeepSubmicron
- DesignForTestability
About Ciena
ciena.comCiena is a global leader in optical and routing systems, services, and automation software.
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